1. Technical Field
The present invention relates to a test apparatus and a driver circuit.
2. Related Art
A semiconductor test apparatus outputs, to a semiconductor device, an output signal for testing that is generated based on a prescribed input pattern. The semiconductor test apparatus switches the voltage of the output signal according to the input pattern by using a CMOS analog switch to switch the reference voltage. Such an apparatus is described in U.S. Pat. No. 7,348,791.
The operational voltage of the CMOS analog switch, however, is dependent on the resistance value when the switch is connected (hereinafter referred to as being “ON”). Accordingly, the output impedance of the semiconductor test apparatus changes depending on a change in the voltage of the output signal based on the input pattern. As a result, it is difficult for the semiconductor test apparatus to match the output impedance to the characteristic impedance of the transmission line.
Furthermore, if the voltage of the output signal has a large amplitude, the CMOS analog switch must have a high withstand voltage according to the voltage of the output signal. A high-withstand-voltage CMOS analog switch has a high RC product, which is a product of the ON resistance R and the capacitance C. In this case, the high ON resistance of the CMOS analog switch is a problem, as is the fact that high capacitance prevents high-speed switching.